Papers

For complete list: Google Scholar

Selected Publications

Rajat Subhra Chakraborty and Rijoy Mukherjee, "FPGA Security," in Encyclopedia of Cryptography, Security and Privacy, S. Jajodia, P. Samarati, and M. Yung, Eds. Berlin, Heidelberg: Springer Berlin Heidelberg, 2019, pp. 1–5, ISBN: 978-3-642-27739-9.

Rijoy Mukherjee and Rajat Subhra Chakraborty, "Detecting Hardware Trojans in High-Level Synthesis-Generated RTL using Large Language Models," ACM Transactions on Design Automation of Electronic Systems, Jan. 2026, Just Accepted.
Sneha Swaroopa, Rijoy Mukherjee, Anushka Debnath, and Rajat Subhra Chakraborty, "Evaluating Large Language Models for Automatic Register Transfer Logic Generation for Combinational Circuits via High-Level Synthesis," Foundations and Trends® in Electronic Design Automation, vol. 14, no. 4, pp. 295–314, 2025.
Rijoy Mukherjee, Archisman Ghosh, and Rajat Subhra Chakraborty, "HLS-IRT: Hardware Trojan Insertion through Modification of Intermediate Representation During High-Level Synthesis," in ACM Transactions on Design Automation of Electronic Systems, 29, 5, Article 81 (September 2024), 23 pages.
Rijoy Mukherjee and Rajat Subhra Chakraborty, "Attacks on Recent DNN IP Protection Techniques and Their Mitigation," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 11, pp. 3642-3650, Nov. 2023.
Rijoy Mukherjee and Rajat Subhra Chakraborty, "Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators," in IEEE Embedded Systems Letters, vol. 14, no. 3, pp. 131-134, Sept. 2022.

Rijoy Mukherjee, Sneha Swaroopa, and Rajat Subhra Chakraborty, "Security Vulnerabilities in AI Hardware: Threats and Countermeasures," in 2024 IEEE 33rd Asian Test Symposium (ATS), Ahmedabad, India, 2024, pp. 1–6.
[Best Paper Nomination] Pranesh Santikellur, Rijoy Mukherjee, and Rajat Subhra Chakraborty, "APUF-BNN: An Automated Framework for Efficient Combinational Logic Based Implementation of Arbiter PUF through Binarized Neural Network," in Proceedings of the 2021 Great Lakes Symposium on VLSI (GLSVLSI '21), Association for Computing Machinery, New York, NY, USA, 89–94.
Sree Ranjani Rajendran, Rijoy Mukherjee, and Rajat Subhra Chakraborty, "SoK: Physical and Logic Testing Techniques for Hardware Trojan Detection," in Proceedings of the 4th ACM Workshop on Attacks and Solutions in Hardware Security (ASHES'20), Association for Computing Machinery, New York, NY, USA, 103–116.