Rijoy Mukherjee

I am currently a Staff R&D Engineer at Synopsys, part of the VC Formal R&D team, working specifically on the application of generative AI for next-gen formal verification of hardware. Previously, I completed my Ph.D. from the Dept of CSE at IIT Kharagpur, advised by Prof. Rajat Subhra Chakraborty. I was awarded the Prime Minister Research Fellowship (PMRF) during my Ph.D. tenure. My research focuses on exploring generative AI methodologies for advancing electronic design automation (EDA) workflows. I am particularly interested in leveraging large language models (LLMs) to aid and automate various computer-aided design tasks, including hardware design and verification.